IBM, Chartered, Infineon, Samsung Collaborate On 45nm Low-Power Technology

Using a process technology jointly developed by the alliance of IBM, Chartered Semiconductor Manufacturing, Infineon Technologies and Samsung Electronics Co., Ltd. new silicon-functional circuits and design kits based on the collaboration for 45nm low-power process technology are now available.

The first working circuits in 45nm technology, targeted at next-generation communication systems were produced at the IBM 300-millimeter fabrication line located in East Fishkill, N.Y., where the joint development team is based according to a statement released Aug. 29.

Among the successfully verified blocks are standard library cells and I/O elements provided by Infineon, as well as embedded memory developed by the alliance. Infineon has included special circuitry on the first 300mm wafers to debug the complex process and to gain experience in product architecture interactions.

"This result is another significant milestone in our successful strategy to develop optimized product solutions using the most advanced technology platforms as early as possible," said Hermann Eul, member of the board of Infineon Technologies. "The first structures in 45nm represent our most cutting-edge technology, bringing together high-performance capabilities and low-power consumption. This solution is clearly well-suited to address the needs of next-generation mobile applications."

The 45nm low-power process is expected to be installed and fully qualified at Chartered, IBM and Samsung 300mm fabs by the end of 2007.

"Our early hardware results indicate that the 45nm node device performance is at least 30% greater than that of the 65nm node, and that product developers can design to this process with confidence," said Lisa Su, vice president of semiconductor research and development at IBM." And, the additional benefit to customers is the flexibility in accessing the technology thanks to the GDSII compatibility across multiple manufacturing facilities."

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