IBM announced it has unveiled a chip-stacking manufacturing technology that paves the way for three-dimensional chips. The technology, "through-silicon vias", allows different chip components to be packaged much closer together for faster, smaller and lower-power systems according to the company.
The new technology means a move from horizontal 2-D chip layouts to 3-D chip stacking, which takes chips and memory devices that traditionally sit side by side on a silicon wafer and stacks them on top of one another. The result is a compact sandwich of components that dramatically reduces the size of the overall chip package and boosts the speed at which data flows among the functions on the chip.
"This breakthrough is a result of more than a decade of pioneering research at IBM," said Lisa Su, vice president, Semiconductor Research and Development Center, IBM. "This allows us to move 3-D chips from the 'lab to the fab' across a range of applications."
The new IBM method eliminates the need for long-metal wires that connect today's 2-D chips together, and instead relies on through-silicon vias, which are essentially vertical connections etched through the silicon wafer and filled with metal. These vias allow multiple chips to be stacked together, allowing greater amounts of information to be passed between the chips.
IBM is already running chips using the through-silicon via technology in its manufacturing line and will begin making sample chips using this method in the second half of this year, with production in 2008.
